1. Field
Exemplary embodiments of the present invention relate to a test setting circuit, a semiconductor device, and a test setting method.
2. Description of the Related Art
Semiconductor devices include test setting circuits for setting different test modes as well as selecting a variety of testing operations. Semiconductor devices also include test circuits that perform the test operations. When a test operation is selected, a semiconductor device enables a test circuit corresponding to the selected test operation and performs the selected test operation. The test mode is a specific operation mode for performing test operations.
FIG. 1 is a flowchart that describes a conventional test operation.
Referring to FIG. 1, at step S101, setting information (i.e., a command and a code for setting a test mode) may be inputted to the semiconductor device. The command may include a mode register set (MRS) command or test mode register set (TMRS) command. The TMRS command is used for setting the operation environment of the semiconductor device. The code inputted along with the command may include multi-bit information for setting the test mode among various operation modes, and some of the bits of the address may be used as the code. At step S102, the test mode of the semiconductor device may be set when some of the bits of the address are inputted as a preset value together with the command.
For controlling the semiconductor device to perform a specific test operation, a test operation to be performed after the test mode is set must be selected. At step S103, select information is inputted. Various test operations may be set to correspond to specific values of the code. For example, when the semiconductor device may perform first to 16th test operations, the first to 16th test operations may correspond to the values of a four-bit code, that is, ‘0000’ to ‘1111’, respectively. The code inputted to select a test operation may have one value among the values of ‘0000’ to ‘1111’. When the code is inputted, a test operation corresponding to the value of the input code may be selected and performed, at step S104.
However, when the semiconductor device performs a test operation or normal operation, addresses (i.e., codes) having various values may be consecutively inputted to the semiconductor device. In this case, a test mode of the semiconductor device may be incorrectly set, or a test operation may be incorrectly selected.